MC68HC908RK2 Datasheet, PDF (104/158 Pages) Motorola, Inc – Microcontroller Unit

System Integration Module (SIM)
STOP/WAIT
CONTROL
SIM
COUNTER
÷2
CLOCK
CONTROL
CLOCK GENERATORS
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO ICG)
COP CLOCK
CGMXCLK (FROM ICG)
CGMOUT (FROM ICG)
INTERNAL CLOCKS
RESET
PIN LOGIC
POR CONTROL
RESET PIN CONTROL
SIM RESET STATUS REGISTER
MASTER
RESET
CONTROL
RESET
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
INTERRUPT CONTROL
AND PRIORITY DECODE
INTERRUPT SOURCES
CPU INTERFACE
Figure 10-2. SIM Block Diagram
Table 10-1 shows the internal signal names used in this section.
Table 10-1. Signal Name Conventions
Signal Name
CGMXCLK
CGMOUT
ICLK
ECLK
IAB
IDB
PORRST
IRST
R/W
Description
Selected clock source from internal clock generator module (ICG)
Clock output from ICG module (bus clock = CGMOUT divided by two)
Output from internal clock generator
External clock source
Internal address bus
internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
MC68HC908RK2 Data Sheet, Rev. 5.1
104
Freescale Semiconductor