MC68HC908RK2 Datasheet, PDF (23/158 Pages) Motorola, Inc – Microcontroller Unit

$FEF0
↓
$FEFF
MONITOR ROM
16 BYTES
$FF00
↓
$FFEF
$FFF0
$FFF1
$FFF2
↓
$FFFF
UNIMPLEMENTED
240 BYTES
FLASH BLOCK PROTECT REGISTER (FLBPR)
RESERVED
FLASH VECTORS
14 BYTES
1. Address $7FEF is reserved for an optional factory-determined
ICG trim value. Consult with a local Freescale representative for
more information and availability of this option.
Figure 2-1. Memory Map (Continued)
Input/Output Section
Addr.
$0000
$0001
$0002
↓
$0003
Register Name
Port A Data Register ^Read:
(PTA) Write:
See page 98. _Reset:
Port B Data Register ^Read:
(PTB) Write:
See page 100.
Reset:
Bit 7
PTA7
Unimplemented
6
PTA6
5
PTA5
PTB5
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
2
PTA2
PTB2
1
PTA1
PTB1
Bit 0
PTA0
PTB0
$0004
$0005
$0006
↓
$0019
Data Direction Register A ^Read:
(DDRA) Write:
See page 98. _Reset:
DDRA7
0
Data Direction Register B
(DDRB)
See page 100.
Read:
Write:
Reset:
MCLKEN
0
DDRA6
0
0
0
DDRA5
0
DDRB5
0
DDRA4
0
DDRB4
0
DDRA3
0
DDRB3
0
DDRA2
0
DDRB2
0
DDRA1
0
DDRB1
0
DDRA0
0
DDRB0
0
Unimplemented
= Unimplemented
R = Reserved U = Unaffected X = Indeterminate
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 5)
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
23