MC68HC908RK2 Datasheet, PDF (103/158 Pages) Motorola, Inc – Microcontroller Unit

Chapter 10
System Integration Module (SIM)
10.1 Introduction
This section describes the system integration module (SIM). Together with the central processor unit
(CPU), the SIM controls all MCU activities. The SIM is a system state controller that coordinates CPU and
exception timing. A block diagram of the SIM is shown in Figure 10-2. Figure 10-1 is a summary of the
SIM input/output (I/O) registers.
The SIM is responsible for:
• Bus clock generation and control for CPU and peripherals:
– Stop/wait/reset/break entry and recovery
– Internal clock control
• Master reset control, including power-on reset (POR) and computer operating properly (COP)
timeout
• Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
• CPU enable/disable timing
Addr.
Register Name
$FE00
SIM Break Status Register ^Read:
(SBSR) Write:
See page 115. _Reset:
Note: Writing a 0 clears SBSW
$FE01
SIM Reset Status Register ^Read:
(SRSR) Write:
See page 116. _POR:
$FE02
SIM Break Flag Control ^Read:
Register (SBFCR) Write:
See page 117. _Reset:
Bit 7
R
POR
1
BCFE
0
6
5
R
R
PIN
COP
X
X
R
R
0
0
= Unimplemented
4
3
2
R
R
R
ILOP
ILAD
0
X
X
X
R
R
R
0
0
0
R = Reserved
Figure 10-1. SIM I/O Register Summary
1
Bit 0
SBSW
R
See Note
0
LVI
0
X
X
R
R
0
0
X = Indeterminate
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
103