MC68HC908RK2 Datasheet, PDF (78/158 Pages) Motorola, Inc – Microcontroller Unit

Internal Clock Generator Module (ICG)
6.7 I/O Registers
The ICG contains five registers, summarized in Figure 6-11. These registers are:
• ICG control register, ICGCR
• ICG multiplier register, ICGMR
• ICG trim register, ICGTR
• ICG DCO divider control register, ICGDVR
• ICG DCO stage control register, ICGDSR
Several of the bits in these registers have interaction where the state of one bit may force another bit to
a particular state or prevent another bit from being set or cleared. A summary of this interaction is shown
in Table 6-5.
Addr.
$0036
$0037
$0038
$0039
$003A
Register Name
Internal Clock Generator ^Read:
Control Register (ICGCR) Write:
See page 79. _Reset:
Internal Clock Generator ^Read:
Multiplier Register (ICGMR) Write:
See page 81.
Reset:
Read:
Internal Clock Generator
Trim Register (ICGTR) Write:
See page 81. _Reset:
ICG DCO Divider Control ^Read:
Register (ICGDVR) Write:
See page 82. _Reset:
ICG DCO Stage Register ^Read:
(ICGDSR) Write:
See page 82.
Reset:
Bit 7
CMIE
0
R
0
TRIM7
1
R
0
DSTG7
6
5
CMF
CMON
0
0
N6
N5
0
0
TRIM6 TRIM5
0
0
R
R
0
0
DSTG6 DSTG5
= Unimplemented
4
3
2
1
Bit 0
ICGS
ECGS
CS
ICGON
ECGON
0
1
0
0
0
N4
N3
N2
N1
N0
1
0
1
0
1
TRIM4 TRIM3 TRIM2 TRIM1 TRIM0
0
0
0
0
0
R
DDIV3 DDIV2 DDIV1 DDIV0
0
U
U
U
U
DSTG4 DSTG3 DSTG2 DSTG1 DSTG0
Unaffected by reset
R = Reserved
U = Unaffected
Figure 6-11. ICG I/O Register Summary
MC68HC908RK2 Data Sheet, Rev. 5.1
78
Freescale Semiconductor