MC68HC908RK2 Datasheet, PDF (89/158 Pages) Motorola, Inc – Microcontroller Unit

Low-Power Modes
Reset clears the keyboard interrupt request and the MODEK bit, clearing the interrupt request even if a
keyboard interrupt pin stays at logic 0.
The keyboard flag bit (KEYF) in the IRQ and keyboard status and control register can be used to see if a
pending interrupt exists. The KEYF bit is not affected by the keyboard interrupt mask bit (IMASKK) which
makes it useful in applications where polling is preferred.
To determine the logic level on a keyboard interrupt pin, use the data direction register to configure the
pin as an input and read the data register.
NOTE
Setting a keyboard interrupt enable bit (KBIE<x>) forces the corresponding
keyboard interrupt pin to be an input, overriding the data direction register.
However, the data direction register bit must be a 0 for software to read the
pin.
7.3.5 Keyboard Initialization
When a keyboard interrupt pin is enabled, it takes time for the internal pullup to reach a logic 1. Therefore,
a false interrupt can occur as soon as the pin is enabled.
To prevent a false interrupt on keyboard initialization:
1. Mask keyboard interrupts by setting the IMASKK bit in the keyboard status and control register.
2. Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register.
3. Write to the ACKK bit in the keyboard status and control register to clear any false interrupts.
4. Clear the IMASKK bit.
An interrupt signal on an edge-triggered pin can be acknowledged immediately after enabling the pin. An
interrupt signal on an edge- and level-triggered interrupt pin must be acknowledged after a delay that
depends on the external load.
Another way to avoid a false interrupt:
1. Configure the keyboard pins as outputs by setting the appropriate DDRA bits in data direction
register A.
2. Write 1s to the appropriate port A data register bits.
3. Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register.
7.4 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
7.4.1 Wait Mode
The IRQ/keyboard interrupts remain active in wait mode. Clearing the IMASKI or IMASKK bits in the IRQ
and keyboard status and control register enables keyboard interrupt requests to bring the MCU out of wait
mode.
7.4.2 Stop Mode
The IRQ/keyboard interrupt remains active in stop mode. Clearing the IMASKI or IMASKK bit in the IRQ
and keyboard status and control register enables keyboard interrupt requests to bring the MCU out of stop
mode.
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
89