MC68HC908RK2 Datasheet, PDF(140/158 Page) Motorola, Inc

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MC68HC908RK2 Datasheet, PDF (140/158 Pages) Motorola, Inc – Microcontroller Unit

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12.3.1.1 Monitor Mode Entry

Table 12-1 shows the pin conditions for entering monitor mode.

Table 12-1. Monitor Mode Entry

IRQ

VTST(2)

PTB0

PTB2

PTA0

CGMOUNT(1)

C-----G----M-----X-----C----L---K---

Bus

Frequency

C-----G----M------O----U----T---

1. If the high voltage (VTST) is removed from the IRQ pin while in monitor mode, the clock

select bit (CS) controls the source of CGMOUT.

2. For VTST, see 13.6 3.0-Volt DC Electrical Characteristics and 13.7 2.0-Volt DC Electrical Char-

acteristics.

Enter monitor mode by either:

â¢ Executing a software interrupt instruction (SWI), or

â¢ Applying a logic 0 and then a logic 1 to the RST pin

NOTE

Upon entering monitor mode, an interrupt stack frame plus a stacked H

Once out of reset, the MCU waits for the host to send eight security bytes (see 12.3.2 Security). After the

security bytes, the MCU sends a break signal (10 consecutive 0s) to the host computer, indicating that it

is ready to receive a command.

Monitor mode uses alternate vectors for reset, SWI, and break interrupt. The alternate vectors are in the

$FE page instead of the $FF page and allow code execution from the internal monitor firmware instead

of user code. The COP module is disabled in monitor mode as long as VTST (see Chapter 13 Electrical

Specifications is applied to either the IRQ pin or the RST pin. (See Chapter 10 System Integration Module

(SIM) for more information on modes of operation.) The ICG module is bypassed in monitor mode as long

as VTST is applied to the IRQ pin. RST does not affect the ICG.

Table 12-2 is a summary of the differences between user mode and monitor mode.

Table 12-2. Mode Differences

Modes

User

Monitor

COP

Enabled

Disabled(1)

Reset

Vector

High

$FFFE

$FEFE

Functions

Reset

Vector

Low

Break

Vector

High

$FFFF $FFFC

$FEFF $FEFC

Break

Vector

Low

$FFFD

$FEFD

SWI

Vector

High

$FFFC

$FEFC

SWI

Vector

Low

$FFFD

$FEFD

1. If the high voltage (VTST) is removed from the IRQ pin while in monitor mode, the SIM asserts

its COP enable output. The COP is a mask option enabled or disabled by the COPD bit in the

configuration register. See 13.6 3.0-Volt DC Electrical Characteristics.

MC68HC908RK2 Data Sheet, Rev. 5.1

140

Freescale Semiconductor

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