MC68HC908RK2 Datasheet, PDF (93/158 Pages) Motorola, Inc – Microcontroller Unit

Chapter 8
Low-Voltage Inhibit (LVI)
8.1 Introduction
The low-voltage inhibit (LVI) module monitors the voltage on the V_DD pin and will set a low voltage sense
bit when V_DD voltage falls to the LVI sense voltage. The LVI will force a reset when the V_DD voltage falls
to the LVI trip voltage.
8.2 Features
Features of the LVI module include:
• Detects two levels of low-voltage condition:
– Low-voltage detection
– Low-voltage reset
• User-configurable for stop mode
8.3 Functional Description
Figure 8-1 shows the structure of the LVI module. The LVI module contains a bandgap reference circuit
and two comparators. The LVI monitors V_DD voltage during normal MCU operation. When enabled, the
LVI module generates a reset when V_DD falls below the V_LVR threshold.
V_DD
STOP INSTRUCTION
LVI STOP BIT IN CONFIGURATION REGISTER
LVI PWR BIT IN CONFIGURATION REGISTER
WEAK
BATTERY
DETECTOR
LVIRST BIT IN CONFIGURATION REGISTER
DEAD
BATTERY
DETECTOR
V_DD > V_LVR = 0
V_DD £ V_LVR = 1
V_DD
LVITRIP
DIGITAL FILTER
CGMXCLK
RESET
V_DD > V_LVS = 0
LOWV
V_DD ≤ V_LVS = 1
Figure 8-1. LVI Module Block Diagram
LOWV FLAG
In addition to forcing a reset condition, the LVI module has a second circuit dedicated to low-voltage
detection. When V_DD falls below V_LVS, the output of the low-voltage comparator asserts the LOWV flag
in the LVI status register (LVISR). In applications that require detecting low batteries, software can
monitor by polling the LOWV bit.
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
93