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MC68HC908RK2 Datasheet, PDF (62/158 Pages) Motorola, Inc – Microcontroller Unit
Internal Clock Generator Module (ICG)
6.3.2 Internal Clock Generator
The internal clock generator, shown in Figure 6-3, creates a low-frequency base clock (IBASE), which
operates at a nominal frequency (fNOM) of 307.2 kHz ±25%, and an internal clock (ICLK) which is an
integer multiple of IBASE. This multiple is the ICG multiplier factor (N), which is programmed in the ICG
multiplier register (ICGMR). The internal clock generator is turned off and the output clocks (IBASE and
ICLK) are held low when the internal clock generator enable signal (ICGEN) is clear.
ICGEN
VOLTAGE &
CURRENT
REFERENCES
++
+
DIGITAL
LOOP
FILTER
–
––
DIGITALLY
CONTROLLED
OSCILLATOR
DSTG[7:0]
DDIV[3:0]
ICLK
TRIM[7:0]
N[6:0]
FREQUENCY
COMPARATOR
CLOCK GENERATOR
MODULO
N
DIVIDER
IBASE
NAME
REGISTER BIT
NAME
MODULE SIGNAL
Figure 6-3. Internal Clock Generator Block Diagram
The internal clock generator contains:
• A digitally controlled oscillator
• A modulo N divider
• A frequency comparator, which contains voltage and current references, a frequency to voltage
converter, and comparators
• A digital loop filter
6.3.2.1 Digitally Controlled Oscillator
The digitally controlled oscillator (DCO) is an inaccurate oscillator which generates the internal clock
(ICLK). The clock period of ICLK is dependent on the digital loop filter outputs (DSTG[7:0] and DDIV[3:0]).
Because there is only a limited number of bits in DDIV and DSTG, the precision of the output (ICLK) is
restricted to a long-term precision of approximately ±0.202% to ±0.368% when measured over several
cycles (of the desired frequency). Additionally, since the propagation delays of the devices used in the
DCO ring oscillator are a measurable fraction of the bus clock period, reaching the long-term precision
may require alternately running faster and slower than desired, making the worst case cycle-to-cycle
frequency variation ±6.45% to ±11.8% (of the desired frequency). The valid values of DDIV:DSTG range
from $000 to $9FF. For more information on the quantization error in the DCO, see 6.4.4 Quantization
Error in DCO Output.
MC68HC908RK2 Data Sheet, Rev. 5.1
62
Freescale Semiconductor