MC68HC908RK2 Datasheet, PDF (77/158 Pages) Motorola, Inc – Microcontroller Unit

Low-Power Modes
6.5 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
6.5.1 Wait Mode
The ICG remains active in wait mode. If enabled, the ICG interrupt to the CPU can bring the MCU out of
wait mode.
In some applications, low-power consumption is desired in wait mode and a high-frequency clock is not
needed. In these applications, reduce power consumption by either selecting a low-frequency external
clock and turn the internal clock generator off, or reduce the bus frequency by minimizing the ICG
multiplier factor (N) before executing the WAIT instruction.
6.5.2 Stop Mode
The ICG is disabled in stop mode. Upon execution of the STOP instruction, all ICG activity will cease and
the output clocks (CGMXCLK and CGMOUT) will be held low. Power consumption will be minimal.
The STOP instruction does not affect the values in the ICG registers. Normal execution will resume after
the MCU exits stop mode.
6.6 Configuration Register Option
One configuration register option affects the functionality of the ICG: EXTSLOW (slow external clock).
All configuration register options will have a default setting. Refer to Chapter 3 Configuration Register
(CONFIG) on how the configuration register is used.
6.6.1 EXTSLOW
Slow external clock (EXTSLOW), when set, will decrease the drive strength of the oscillator amplifier,
enabling low-frequency crystal operation (30 kHz–100 kHz). When clear, EXTSLOW enables high
frequency crystal operation (1 MHz to 8 MHz).
EXTSLOW, when set, also configures the clock monitor to expect an external clock source that is slower
than the low-frequency base clock (60 Hz–307.2 kHz). When EXTSLOW is clear, the clock monitor will
expect an external clock faster than the low-frequency base clock (307.2 kHz–32 MHz).
The default state for this option is clear.
MC68HC908RK2 Data Sheet, Rev. 5.1
Freescale Semiconductor
77