MC68HC908RK2 Datasheet, PDF (154/158 Pages) Motorola, Inc – Microcontroller Unit

Electrical Specifications
13.11 Memory Characteristics
Characteristic
RAM data retention voltage
FLASH pages per row
FLASH bytes per page
FLASH read bus clock frequency
FLASH charge pump clock frequency
(see 2.5.2 FLASH 2TS Charge Pump Frequency Control)
FLASH block/bulk erase time
FLASH high voltage kill time
FLASH return to read time
FLASH page program pulses
FLASH page program step size
FLASH cumulative program time per row between erase
cycles
FLASH HVEN low to MARGIN high time
FLASH MARGIN high to PGM low time
FLASH 2TS row program endurance⁽⁶⁾
FLASH data retention time⁽⁷⁾
Symbol
V_RDR
—
—
f_Read(1)
f_Pump(2)
t_Erase
t_Kill
t_HVD
fls_Pulses(3)
t_Step(4)
t_Row(5)
t_HVTV
t_VTP
—
—
Min
Typ
Max
Unit
1.3
—
—
V
8
—
8
Pages
1
—
1
Bytes
32 K
—
2.5 M
Hz
1.8
—
2.5
MHz
30
—
200
—
50
—
—
—
1.0
—
—
—
50
—
150
—
10⁴
-—
15
100
—
ms
—
ms
—
ms
10
Pulses
1.2
ms
Page
8
program
cycles
—
ms
—
ms
-—
Cycles
-—
Years
1. f_READ is defined as the frequency range for which the FLASH memory can be read.
2. f_Pump is defined as the charge pump clock frequency required for program, erase, and margin read operations.
3. fls_Pulses is defined as the number of pulses used to program the FLASH using the required smart program algorithm.
4. t_Step is defined as the amount of time during one page program cycle that HVEN is held high.
5. t_Row is defined as the cumulative time a row can see the program voltage before the row must be erased before further
programming.
6. The minimum row endurance value specifies each row of the FLASH 2TS memory is guaranteed to work for at least this
many erase/program cycles.
7. The FLASH is guaranteed to retain data over the entire temperature range for at least the minimum time specified.
MC68HC908RK2 Data Sheet, Rev. 5.1
154
Freescale Semiconductor