MC68HC908GZ8 Datasheet, PDF (88/344 Pages) Motorola, Inc – Microcontrollers

Clock Generator Module (CGM)
7.3.6 Programming the PLL
Use the following procedure to program the PLL. For reference, the variables used
and their meaning are shown in Table 7-1.
Table 7-1. Variable Definitions
Variable
f_BUSDES
f_VCLKDES
f_RCLK
f_VCLK
f_BUS
f_NOM
f_VRS
Definition
Desired bus clock frequency
Desired VCO clock frequency
Chosen reference crystal frequency
Calculated VCO clock frequency
Calculated bus clock frequency
Nominal VCO center frequency
Programmed VCO center frequency
NOTE:
The round function in the following equations means that the real number should
be rounded to the nearest integer number.
1. Choose the desired bus frequency, f_BUSDES.
2. Calculate the desired VCO frequency (four times the desired bus
frequency).
f_VCLKDES = 4 x f_BUSDES
3. Choose a practical PLL (crystal) reference frequency, f_RCLK. Typically, the
reference crystal is 1–8 MHz.
Frequency errors to the PLL are corrected at a rate of f_RCLK.
For stability and lock time reduction, this rate must be as fast as possible.
The VCO frequency must be an integer multiple of this rate. The relationship
between the VCO frequency, f_VCLK, and the reference frequency, f_RCLK, is:
f_VCLK = (N) (f_RCLK)
N, the range multiplier, must be an integer.
In cases where desired bus frequency has some tolerance, choose f_RCLK to
a value determined either by other module requirements (such as modules
which are clocked by CGMXCLK), cost requirements, or ideally, as high as
the specified range allows. See Section 24. Electrical Specifications.
After choosing N, the actual bus frequency can be determined using
equation in 2 above.
4. Select a VCO frequency multiplier, N.
N
=
r
o
u
n
d



f--_{V----fC--R--L--C-K--L-D--K--E----S- }
Data Sheet
88
Clock Generator Module (CGM)
MC68HC908GZ8
Freescale Semiconductor