MC68HC908GZ8 Datasheet, PDF (175/344 Pages) Motorola, Inc – Microcontrollers

MSCAN08 Controller (MSCAN08)
Timer Link
16.9 Timer Link
The MSCAN08 will generate a timer signal whenever a valid frame has been
received. Because the CAN specification defines a frame to be valid if no errors
occurred before the EOF field has been transmitted successfully, the timer signal
will be generated right after the EOF. A pulse of one bit time is generated. As the
MSCAN08 receiver engine also receives the frames being sent by itself, a timer
signal also will be generated after a successful transmission.
The previously described timer signal can be routed into the on-chip 2-channel
timer interface module 2 (TIM2). This signal is connected to TIM2 channel 0 input
under the control of the timer link enable (TLNKEN) bit in CMCR0.
After the timer has been programmed to capture rising edge events, it can be used
under software control to generate 16-bit time stamps which can be stored with the
received message.
16.10 Clock System
Figure 16-7 shows the structure of the MSCAN08 clock generation circuitry and its
interaction with the clock generation module (CGM). With this flexible clocking
scheme the MSCAN08 is able to handle CAN bus rates ranging from 10 kbps up
to 1 Mbps.
CGM
MSCAN08
OSC
÷2
CGMXCLK
PLL
÷2
CGMOUT
(TO SIM)
BCS
÷2
CLKSRC
(2 * BUS FREQUENCY)
PRESCALER
(1 ... 64)
MSCANCLK
Figure 16-7. Clocking Scheme
MC68HC908GZ8
Freescale Semiconductor
MSCAN08 Controller (MSCAN08)
Data Sheet
175