English
Language : 

MC68HC908GZ8 Datasheet, PDF (232/344 Pages) Motorola, Inc – Microcontrollers
Enhanced Serial Communications Interface (ESCI) Module
The maximum percent difference between the receiver count and the
transmitter count of a fast 8-bit character with no errors is
1----5---4-----–-----1---6---0-- × 100 = 3.90%.
154
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in Figure 19-8, the receiver counts 170
RT cycles at the point when the count of the transmitting device is
11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the
transmitter count of a fast 9-bit character with no errors is:
1----7---0-----–-----1---7---6-- × 100 = 3.53%.
170
19.4.3.6 Receiver Wakeup
So that the MCU can ignore transmissions intended only for other receivers in
multiple-receiver systems, the receiver can be put into a standby state. Setting the
receiver wakeup bit, RWU, in SCC2 puts the receiver into a standby state during
which receiver interrupts are disabled.
Depending on the state of the WAKE bit in SCC1, either of two conditions on the
RxD pin can bring the receiver out of the standby state:
1. Address mark — An address mark is a logic 1 in the MSB position of a
received character. When the WAKE bit is set, an address mark wakes the
receiver from the standby state by clearing the RWU bit. The address mark
also sets the ESCI receiver full bit, SCRF. Software can then compare the
character containing the address mark to the user-defined address of the
receiver. If they are the same, the receiver remains awake and processes
the characters that follow. If they are not the same, software can set the
RWU bit and put the receiver back into the standby state.
2. Idle input line condition — When the WAKE bit is clear, an idle character on
the RxD pin wakes the receiver from the standby state by clearing the RWU
bit. The idle character that wakes the receiver does not set the receiver idle
bit, IDLE, or the ESCI receiver full bit, SCRF. The idle line type bit, ILTY,
determines whether the receiver begins counting logic 1s as idle character
bits after the start bit or after the stop bit.
NOTE: With the WAKE bit clear, setting the RWU bit after the RxD pin has been idle will
cause the receiver to wakeup.
Data Sheet
232
Enhanced Serial Communications Interface (ESCI) Module
MC68HC908GZ8
Freescale Semiconductor