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MC68HC908GZ8 Datasheet, PDF (79/344 Pages) Motorola, Inc – Microcontrollers
Break Module (BRK)
Functional Description
CAUTION:
When the internal address bus matches the value written in the break address
registers or when software writes a logic 1 to the BRKA bit in the break status and
control register, the CPU starts a break interrupt by:
• Loading the instruction register with the SWI instruction
• Loading the program counter with $FFFC and $FFFD ($FEFC and $FEFD
in monitor mode)
The break interrupt timing is:
• When a break address is placed at the address of the instruction opcode,
the instruction is not executed until after completion of the break interrupt
routine.
• When a break address is placed at an address of an instruction operand, the
instruction is executed before the break interrupt.
• When software writes a logic 1 to the BRKA bit, the break interrupt occurs
just before the next instruction is executed.
By updating a break address and clearing the BRKA bit in a break interrupt routine,
a break interrupt can be generated continuously.
A break address should be placed at the address of the instruction opcode. When
software does not change the break address and clears the BRKA bit in the first
break interrupt routine, the next break interrupt will not be generated after exiting
the interrupt routine even when the internal address bus matches the value written
in the break address registers.
6.3.1 Flag Protection During Break Interrupts
The system integration module (SIM) controls whether or not module status bits
can be cleared during the break state. The BCFE bit in the break flag control
register (BFCR) enables software to clear status bits during the break state. See
20.7.3 Break Flag Control Register and the Break Interrupts subsection for
each module.
6.3.2 TIM During Break Interrupts
A break interrupt stops the timer counter.
6.3.3 COP During Break Interrupts
The COP is disabled during a break interrupt when VTST is present on the RST pin.
MC68HC908GZ8
Freescale Semiconductor
Break Module (BRK)
Data Sheet
79