MC68HC908GZ8 Datasheet, PDF (296/344 Pages) Motorola, Inc – Microcontrollers

Serial Peripheral Interface (SPI) Module
NOTE:
Do not write to the SPI data register unless the SPTE bit is high.
During an SPTE CPU interrupt, the CPU clears the SPTE bit by writing to the
transmit data register.
Reset sets the SPTE bit.
1 = Transmit data register empty
0 = Transmit data register not empty
MODFEN — Mode Fault Enable Bit
This read/write bit, when set to 1, allows the MODF flag to be set. If the MODF
flag is set, clearing the MODFEN does not clear the MODF flag. If the SPI is
enabled as a master and the MODFEN bit is low, then the SS pin is available as
a general-purpose I/O.
If the MODFEN bit is set, then this pin is not available as a general-purpose I/O.
When the SPI is enabled as a slave, the SS pin is not available as a
general-purpose I/O regardless of the value of MODFEN. See 21.12.4 SS
(Slave Select).
If the MODFEN bit is low, the level of the SS pin does not affect the operation
of an enabled SPI configured as a master. For an enabled SPI configured as a
slave, having MODFEN low only prevents the MODF flag from being set. It does
not affect any other part of SPI operation. See 21.7.2 Mode Fault Error.
SPR1 and SPR0 — SPI Baud Rate Select Bits
In master mode, these read/write bits select one of four baud rates as shown in
Table 21-4. SPR1 and SPR0 have no effect in slave mode. Reset clears SPR1
and SPR0.
Table 21-4. SPI Master Baud Rate Selection
SPR1 and SPR0
00
01
10
11
Baud Rate Divisor (BD)
2
8
32
128
Use this formula to calculate the SPI baud rate:
Baud rate = ^{C-----G----M------O----U-----T--}
2 × BD
where:
CGMOUT = base clock output of the clock generator module (CGM)
BD = baud rate divisor
Data Sheet
296
Serial Peripheral Interface (SPI) Module
MC68HC908GZ8
Freescale Semiconductor