MC68HC908GZ8 Datasheet, PDF (167/344 Pages) Motorola, Inc – Microcontrollers

MSCAN08 Controller (MSCAN08)
Identifier Acceptance Filter
Acceptance Control Register). These identifier hit flags (IDHIT1 and IDHIT0)
clearly identify the filter section that caused the acceptance. They simplify the
application software’s task to identify the cause of the receiver interrupt. In case
that more than one hit occurs (two or more filters match) the lower hit has priority.
A very flexible programmable generic identifier acceptance filter has been
introduced to reduce the CPU interrupt loading. The filter is programmable to
operate in four different modes:
1. Single identifier acceptance filter, each to be applied to a) the full 29 bits of
the extended identifier and to the following bits of the CAN frame: RTR, IDE,
SRR or b) the 11 bits of the standard identifier plus the RTR and IDE bits of
CAN 2.0A/B messages. This mode implements a single filter for a full length
CAN 2.0B compliant extended identifier. Figure 16-3 shows how the 32-bit
filter bank (CIDAR0-3, CIDMR0-3) produces a filter 0 hit.
2. Two identifier acceptance filters, each to be applied to:
a. The 14 most significant bits of the extended identifier plus the SRR and
the IDE bits of CAN2.0B messages, or
b. The 11 bits of the identifier plus the RTR and IDE bits of CAN 2.0A/B
messages.
Figure 16-4 shows how the 32-bit filter bank (CIDAR0–CIDAR3 and
CIDMR0–CIDMR3) produces filter 0 and 1 hits.
3. Four identifier acceptance filters, each to be applied to the first eight bits of
the identifier. This mode implements four independent filters for the first
eight bits of a CAN 2.0A/B compliant standard identifier. Figure 16-5 shows
how the 32-bit filter bank (CIDAR0–CIDAR3 and CIDMR0–CIDMR3)
produces filter 0 to 3 hits.
4. Closed filter. No CAN message will be copied into the foreground buffer
RxFG, and the RXF flag will never be set.
MC68HC908GZ8
Freescale Semiconductor
MSCAN08 Controller (MSCAN08)
Data Sheet
167