MC68HC908GZ8 Datasheet, PDF (152/344 Pages) Motorola, Inc – Microcontrollers

Monitor ROM (MON)
Simple monitor commands can access any memory address. In monitor mode, the
MCU can execute code downloaded into RAM by a host computer while most MCU
pins retain normal operating mode functions. All communication between the host
computer and the MCU is through the PTA0 pin. A level-shifting and multiplexing
interface is required between PTA0 and the host computer. PTA0 is used in a
wired-OR configuration and requires a pullup resistor.
Table 15-1 shows the pin conditions for entering monitor mode. As specified in the
table, monitor mode may be entered after a power-on reset (POR) and will allow
communication at 7200 baud provided one of the following sets of conditions is
met:
• If $FFFE and $FFFF does not contain $FF (programmed state):
– The external clock is 4 MHz (7200 baud)
– PTB4 = low
– IRQ = V_TST
• If $FFFE and $FFFF do not contain $FF (programmed state):
– The external clock is 8 MHz (7200 baud)
– PTB4 = high
– IRQ = V_TST
• If $FFFE and $FFFF contain $FF (erased state):
– The external clock is 8 MHz (7200 baud)
– IRQ = V_DD (this can be implemented through the internal IRQ pullup) or
V_SS
Enter monitor mode with pin configuration shown in Table 15-1 by pulling RST low
and then high. The rising edge of RST latches monitor mode. Once monitor mode
is latched, the values on the specified pins can change.
Once out of reset, the MCU waits for the host to send eight security bytes (see
15.4 Security). After the security bytes, the MCU sends a break signal (10
consecutive logic 0s) to the host, indicating that it is ready to receive a command.
Data Sheet
152
Monitor ROM (MON)
MC68HC908GZ8
Freescale Semiconductor