MC68HC908GZ8 Datasheet, PDF (33/344 Pages) Motorola, Inc – Microcontrollers

Memory Map
Input/Output (I/O) Section
Addr.
$000B
$000C
$000D
$000E
$000F
$0010
$0011
$0012
$0013
$0014
$0015
$0016
Register Name
Bit 7
ESCI Arbiter Data ^Read:
Register (SCIADAT) Write:
See page 251. _Reset:
ARD7
0
Data Direction Register E ^Read:
0
(DDRE) Write:
See page 214. _Reset:
0
Port A Input Pullup Enable ^Read: _PTAPUE7
Register (PTAPUE) Write:
See page 204. _Reset:
0
Port C Input Pullup Enable ^Read:
0
Register (PTCPUE) Write:
See page 209. _Reset:
0
Port D Input Pullup Enable ^Read: _PTDPUE7
Register (PTDPUE) Write:
See page 213. _Reset:
0
SPI Control Register ^Read:
(SPCR) Write:
See page 293. _Reset:
SPRIE
0
SPI Status and Control ^Read:
Register (SPSCR) Write:
See page 295. _Reset:
SPRF
0
SPI Data Register ^{Read: R7}
(SPDR) Write: T7
See page 297. _Reset:
ESCI Control Register 1 ^Read:
(SCC1) Write:
See page 235. _Reset:
LOOPS
0
ESCI Control Register 2 ^Read:
(SCC2) Write:
See page 237. _Reset:
SCTIE
0
ESCI Control Register 3 ^{Read: R8}
(SCC3) Write:
See page 239. _Reset:
U
ESCI Status Register 1 ^Read:
(SCS1) Write:
See page 241. _Reset:
SCTE
1
6
ARD6
0
0
0
PTAPUE6
0
PTCPUE6
0
PTDPUE6
0
R
0
ERRIE
0
R6
T6
ENSCI
0
TCIE
0
T8
0
TC
1
5
ARD5
0
DDRE5
0
PTAPUE5
0
PTCPUE5
0
PTDPUE5
0
SPMSTR
1
OVRF
0
R5
T5
TXINV
0
SCRIE
0
R
0
SCRF
0
4
3
ARD4
ARD3
0
0
DDRE4 DDRE3
0
0
PTAPUE4 PTAPUE3
0
0
PTCPUE4 PTCPUE3
0
0
PTDPUE4 PTDPUE3
0
0
CPOL
CPHA
0
MODF
1
SPTE
0
1
R4
R3
T4
T3
Unaffected by reset
M
WAKE
0
0
ILIE
TE
0
0
R
ORIE
0
0
IDLE
OR
0
0
2
ARD2
0
DDRE2
0
PTAPUE2
0
PTCPUE2
0
PTDPUE2
0
SPWOM
0
MODFEN
0
R2
T2
ILTY
0
RE
0
NEIE
0
NF
0
1
ARD1
0
DDRE1
0
PTAPUE1
0
PTCPUE1
0
PTDPUE1
0
SPE
0
SPR1
0
R1
T1
PEN
0
RWU
0
FEIE
0
FE
0
Bit 0
ARD0
0
DDRE0
0
PTAPUE0
0
PTCPUE0
0
PTDPUE0
0
SPTIE
0
SPR0
0
R0
T0
PTY
0
SBK
0
PEIE
0
PE
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 8)
MC68HC908GZ8
Freescale Semiconductor
Memory Map
Data Sheet
33