MC68HC908GZ8 Datasheet, PDF (170/344 Pages) Motorola, Inc – Microcontrollers

MSCAN08 Controller (MSCAN08)
16.6 Interrupts
The MSCAN08 supports four interrupt vectors mapped onto eleven different
interrupt sources, any of which can be individually masked. For details, see 16.13.5
MSCAN08 Receiver Flag Register (CRFLG) through 16.13.8 MSCAN08
Transmitter Control Register.
1. Transmit Interrupt: At least one of the three transmit buffers is empty (not
scheduled) and can be loaded to schedule a message for transmission. The
TXE flags of the empty message buffers are set.
2. Receive Interrupt: A message has been received successfully and loaded
into the foreground receive buffer. This interrupt will be emitted immediately
after receiving the EOF symbol. The RXF flag is set.
3. Wakeup Interrupt: An activity on the CAN bus occurred during MSCAN08
internal sleep mode or power-down mode (provided SLPAK = WUPIE = 1).
4. Error Interrupt: An overrun, error, or warning condition occurred. The
receiver flag register (CRFLG) will indicate one of the following conditions:
– Overrun: An overrun condition as described in 16.4.2 Receive
Structures, has occurred.
– Receiver Warning: The receive error counter has reached the CPU
warning limit of 96.
– Transmitter Warning: The transmit error counter has reached the CPU
warning limit of 96.
– Receiver Error Passive: The receive error counter has exceeded the
error passive limit of 127 and MSCAN08 has gone to error passive state.
– Transmitter Error Passive: The transmit error counter has exceeded the
error passive limit of 127 and MSCAN08 has gone to error passive state.
– Bus Off: The transmit error counter has exceeded 255 and MSCAN08
has gone to bus off state.
16.6.1 Interrupt Acknowledge
Interrupts are directly associated with one or more status flags in either the
MSCAN08 receiver flag register (CRFLG) or the MSCAN08 transmitter flag register
(CTFLG). Interrupts are pending as long as one of the corresponding flags is set.
The flags in the above registers must be reset within the interrupt handler in order
to handshake the interrupt. The flags are reset through writing a ‘1’ to the
corresponding bit position. A flag cannot be cleared if the respective condition still
prevails.
NOTE: Bit manipulation instructions (BSET) shall not be used to clear interrupt flags.
Data Sheet
170
MSCAN08 Controller (MSCAN08)
MC68HC908GZ8
Freescale Semiconductor