MC68HC908GZ8 Datasheet, PDF (125/344 Pages) Motorola, Inc – Microcontrollers

Data Sheet — MC68HC908GZ8
Section 11. FLASH Memory (FLASH)
11.1 Introduction
This section describes the operation of the embedded FLASH memory. This
memory can be read, programmed, and erased from a single external supply. The
program, erase, and read operations are enabled through the use of an internal
charge pump. It is recommended that the user utilize the FLASH programming
routines provided in the on-chip ROM, which are described more fully in a separate
Freescale application note.
11.2 Functional Description
The FLASH memory is an array of 7936 bytes with an additional 44 bytes of user
vectors and one byte of block protection. An erased bit reads as logic 1 and a
programmed bit reads as a logic 0. Memory in the FLASH array is organized into
two rows per page basis. For the 16-K word by 8-bit embedded FLASH memory,
the page size is 64 bytes per page and the row size is 32 bytes per row. Hence the
minimum erase page size is 64 bytes and the minimum program row size is 32
bytes. Program and erase operation operations are facilitated through control bits
in FLASH control register (FLCR). Details for these operations appear later in this
section.
The address ranges for the user memory and vectors are:
• $E000–$FDFF; user memory
• $FE08; FLASH control register
• $FF7E; FLASH block protect register
• $FFD4–$FFFF; these locations are reserved for user-defined interrupt and
reset vectors
NOTE:
Programming tools are available from Freescale. Contact your local Freescale
representative for more information.
A security feature prevents viewing of the FLASH contents.⁽¹⁾
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
MC68HC908GZ8
Freescale Semiconductor
FLASH Memory (FLASH)
Data Sheet
125