MC68HC908GZ8 Datasheet, PDF (82/344 Pages) Motorola, Inc – Microcontrollers

Break Module (BRK)
6.4.4 Break Flag Control Register
The break control register (BFCR) contains a bit that enables software to clear
status bits while the MCU is in a break state.
Address: $FE03
Bit 7
6
5
4
3
2
1
Bit 0
Read: _BCFE
R
R
R
R
R
R
R
Write:
Reset:
0
R = Reserved
Figure 6-7. Break Flag Control Register (BFCR)
BCFE — Break Clear Flag Enable Bit
This read/write bit enables software to clear status bits by accessing status
registers while the MCU is in a break state. To clear status bits during the break
state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
6.5 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby
modes. If enabled, the break module will remain enabled in wait and stop modes.
However, since the internal address bus does not increment in these modes, a
break interrupt will never be triggered.
Data Sheet
82
Break Module (BRK)
MC68HC908GZ8
Freescale Semiconductor