MC68HC711D3CFNE2 Datasheet, PDF (76/124 Pages) Freescale Semiconductor, Inc – Power Saving STOP and WAIT Modes

Freescale Semiconductor, Inc.
EXTAL
XTAL
OSCILLATOR
AND
CLOCK GENERATOR
(÷ 4)
E
AS
INTERNAL BUS CLOCK (PH2)
÷3
÷4
÷ 13
SCP[1:0]
0:0
0:1
1:0
1:1
SCR[2:0]
0:0:0
÷2
0:0:1
÷2
0:1:0
÷2
0:1:1
÷2
1:0:0
÷2
1:0:1
÷2
1:1:0
÷ 16
SCI
TRANSMIT
BAUD RATE
(1X)
÷2
1:1:1
SCI
RECEIVE
BAUD RATE
(16X)
SCI BAUD GENERATOR
Figure 7-3 SCI Baud Rate Diagram
7.7 Status Flags and Interrupts
The SCI transmitter has two status flags. These status flags can be read by software
(polled) to tell when the corresponding condition exists. Alternatively, a local interrupt
enable bit can be set to enable each of these status conditions to generate interrupt
requests when the corresponding condition is present. Status flags are automatically
set by hardware logic conditions, but must be cleared by software, which provides an
interlock mechanism that enables logic to know when software has noticed the status
indication. The software clearing sequence for these flags is automatic — functions
that are normally performed in response to the status flags also satisfy the conditions
of the clearing sequence.
7-10
SERIAL COMMUNICATIONS INTERFACE
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TECHNICAL DATA