MC68HC711D3CFNE2 Datasheet, PDF (117/124 Pages) Freescale Semiconductor, Inc – Power Saving STOP and WAIT Modes

Freescale Semiconductor, Inc.
SS
(INPUT)
SCK (CPOL = 0)
(INPUT)
SCK (CPOL = 1)
(INPUT)
8
MISO
(OUTPUT)
MOSI
(INPUT)
1
4
2
5
SLAVE
6
MSB OUT
7
MSB IN
5
4
BIT 6 - - - -1
10
11
BIT 6 - - - -1
13
12 3
12
13
SLAVE LSB OUT
11
LSB IN
9
SEE
NOTE
NOTE: Not defined but normally MSB of character just received.
Figure A-11 SPI Slave Timing (CPHA = 0)
SPI SLAVE CPHA0 TIM
SS
(INPUT)
SCK (CPOL = 0)
(INPUT)
SCK (CPOL = 1)
(INPUT)
8
MISO
(OUTPUT)
MOSI
(INPUT)
1
5
2
SEE
NOTE
10
SLAVE
6
4
MSB OUT
7
MSB IN
4
5
BIT 6 - - - -1
10
11
BIT 6 - - - -1
12
13
3
13
12 9
SLAVE LSB OUT
LSB IN
NOTE: Not defined but normally LSB of character previously transmitted.
SPI SLAVE CPHA1 TIM
Figure A-12 SPI Slave Timing (CPHA = 1)
TECHNICAL DATA
ELECTRICAL CHARACTERISTICS
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A-13