MC68HC711D3CFNE2 Datasheet, PDF (36/124 Pages) Freescale Semiconductor, Inc – Power Saving STOP and WAIT Modes

Freescale Semiconductor, Inc.
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
AS
R/W
E
MCU
HC373
D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7
D8 Q8
LE OE
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
WE
OE
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
Figure 4-1 Address/Data Demultiplexing
ADDR/DATA DEMUX
4.1.3 Special Test Mode
Special test, a variation of the expanded multiplexed mode, is primarily used during
Motorola's internal production testing; however, it is accessible for programming the
CONFIG register, and supporting emulation and debugging during development.
4.1.4 Bootstrap Mode
When the MCU is reset in special bootstrap mode, a small amount of on-chip ROM is
enabled at address $BF00–$BFFF. The ROM contains a bootloader program and a
special set of interrupt and reset vectors. The MCU fetches the reset vector, then ex-
ecutes the bootloader.
For normal use of the bootloader program, send $FF to the SCI receiver at either E
clock ÷16, or E clock ÷104 (1200 baud for E clock equals 2 MHz). Then download up
to 192 bytes of program data, which is put into RAM starting at $0040. These charac-
ters are echoed through the transmitter. When loading is complete, the program jumps
to location $0040 and begins executing the code. The bootloader program ends the
download after 192 bytes, or when the received data line is idle for at least four char-
acter times. Use of an external pullup resistor is required when using the SCI transmit-
ter pin because port D pins are configured for wired-OR operation by the bootloader.
In bootstrap mode, the interrupt vectors are directed to RAM. This allows the use of
interrupts through a jump table. Refer to Freescale application note AN1060,
MC68HC11 Bootstrap Mode.
OPERATING MODES AND ON-CHIP MEMORY
4-2
TECHNICAL DATA
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