|
MC68HC711D3CFNE2 Datasheet, PDF (33/124 Pages) Freescale Semiconductor, Inc – Power Saving STOP and WAIT Modes | |||
|
◁ |
Freescale Semiconductor, Inc.
Table 3-2 Instruction Set (Sheet 6 of 7)
Mnemonic Operation
Description
Addressing
Instruction
Condition Codes
Mode
Opcode Operand Cycles S X H I N Z V C
SBCA (opr) Subtract with
Carry from A
AâMâCâA A
A
A
A
A
IMM
DIR
EXT
IND,X
IND,Y 18
82 ii
92 dd
B2 hh ll
A2 ff
A2 ff
2
ââââ â â â â
3
4
4
5
SBCB (opr) Subtract with
Carry from B
BâMâCâB B
B
B
B
B
IMM
DIR
EXT
IND,X
IND,Y 18
C2 ii
D2 dd
F2 hh ll
E2 ff
E2 ff
2
ââââ â â â â
3
4
4
5
SEC
Set Carry
1âC
INH
0D
â
2
âââââââ 1
SEI
Set Interrupt
Mask
1âI
INH
0F
â
2
âââ 1 ââââ
SEV
Set Overflow
Flag
1âV
INH
0B
â
2
ââââââ 1 â
STAA (opr)
Store
Accumulator
A
AâM
A
DIR
97 dd
A
EXT
B7 hh ll
A
IND,X
A7 ff
A
IND,Y 18
A7 ff
3
ââââ â â 0 â
4
4
5
STAB (opr)
Store
Accumulator
B
BâM
B
DIR
D7 dd
B
EXT
F7 hh ll
B
IND,X
E7 ff
B
IND,Y 18
E7 ff
3
ââââ â â 0 â
4
4
5
STD (opr)
Store
Accumulator
D
A â M, B â M + 1
DIR
EXT
IND,X
IND,Y 18
DD dd
FD hh ll
ED ff
ED ff
4
ââââ â â 0 â
5
5
6
STOP
Stop Internal
â
Clocks
INH
CF
â
2
ââââââââ
STS (opr)
Store Stack
Pointer
SP â M : M + 1
DIR
EXT
IND,X
IND,Y 18
9F dd
BF hh ll
AF ff
AF ff
4
ââââ â â 0 â
5
5
6
STX (opr)
Store Index
Register X
IX â M : M + 1
DIR
EXT
IND,X
IND,Y CD
DF dd
FF hh ll
EF ff
EF ff
4
ââââ â â 0 â
5
5
6
STY (opr)
Store Index
Register Y
IY â M : M + 1
DIR
18
EXT 18
IND,X 1A
IND,Y 18
DF dd
FF hh ll
EF ff
EF ff
5
ââââ â â 0 â
6
6
6
SUBA (opr)
Subtract
AâMâA
A
IMM
Memory from
A
DIR
A
A
EXT
80 ii
90 dd
B0 hh ll
2
ââââ â â â â
3
4
A
IND,X
A0 ff
4
A
IND,Y 18
A0 ff
5
SUBB (opr)
Subtract
Memory from
B
BâMâB
A
A
A
A
A
IMM
DIR
EXT
IND,X
IND,Y 18
C0 ii
D0 dd
F0 hh ll
E0 ff
E0 ff
2
ââââ â â â â
3
4
4
5
SUBD (opr)
Subtract
Memory from
D
DâM:M+1âD
IMM
DIR
EXT
IND,X
IND,Y 18
83 jj kk
93 dd
B3 hh ll
A3 ff
A3 ff
4
ââââ â â â â
5
6
6
7
SWI
Software
See Figure 3â2
INH
Interrupt
3F
â
14 â â â 1 â â â â
TAB
Transfer A to B
AâB
INH
16
â
2
ââââ â â 0 â
TAP
Transfer A to
A â CCR
CC Register
INH
06
â
2
ââââââââ
TBA
Transfer B to A
BâA
INH
17
â
2
ââââ â â 0 â
TEST
TEST (Only in Address Bus Counts
INH
Test Modes)
00
â
*
ââââââââ
TPA
Transfer CC
CCR â A
Register to A
INH
07
â
2
ââââââââ
TST (opr)
Test for Zero
or Minus
Mâ0
EXT
IND,X
IND,Y 18
7D hh ll
6D ff
6D ff
6
ââââ â â 0 0
6
7
TSTA
Test A for Zero
or Minus
Aâ0
A
INH
4D
â
2
ââââ â â 0 0
TSTB
Test B for Zero
or Minus
Bâ0
B
INH
5D
â
2
ââââ â â 0 0
TECHNICAL DATA
CENTRAL PROCESSING UNIT
For More Information On This Product,
Go to: www.freescale.com
3-13
|
▷ |