MC68HC711D3CFNE2 Datasheet, PDF (56/124 Pages) Freescale Semiconductor, Inc – Power Saving STOP and WAIT Modes

Freescale Semiconductor, Inc.
HIGHEST
PRIORITY
POWER-ON RESET
(POR)
DELAY 4064 E CYCLES
EXTERNAL RESET
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFE, $FFFF
(VECTOR FETCH)
CLOCK MONITOR FAIL
(WITH CME = 1)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFC, $FFFD
(VECTOR FETCH)
LOWEST
PRIORITY
COP WATCHDOG
TIMEOUT
(WITH NOCOP = 0)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFA, $FFFB
(VECTOR FETCH)
5-12
SET BITS S, I, AND X
RESET MCU
HARDWARE
1A
BEGIN INSTRUCTION
SEQUENCE
Y
BIT X IN
CCR = 1?
N
XIRQ
Y
PIN LOW?
N
2A
STACK CPU
REGISTERS
SET BITS I AND X
FETCH VECTOR
$FFF4, $FFF5
Figure 5-1 Processing Flow out of Reset (1 of 2)
FLOW OUT OF RESET P1
RESETS AND INTERRUPTS
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TECHNICAL DATA