Z80182 Datasheet, PDF (93/109 Pages) Zilog, Inc. – ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)

Zilog
ESCC Timing
PRELIMINARY
Z80182/Z8L182
ZILOG INTELLIGENT PERIPHERAL
Ø
/WR
/RD
/W//REQ
Wait
/W//REQ
Request
/DTR//REQ
Request
/INT
No.
Symbol
1
TdWR(W)
2
TdRD(W)
3
TdWRf(REQ)
4
TdRDf(REQ)
5
TdRdr(REQ)
6
TdPC(INT)
1
2
3
4
5
6
Figure 104. ESCC AC Parameter
Table B. ESCC Timing Parameters
Parameter
20 MHz
Min
Max
Unit
/WR Fall to Wait Valid Delay
/RD Fall to Wait Valid Delay
/WR Fall to /W//REQ
Not Valid Delay
50
ns
50
65
/RD Fall to /W//REQ
Not Valid Delay
65
/RD Rise to /DTR//REQ
Not Valid Delay
TBD
Clock to /INT Valid Delay
160
DS971820600
3-93