Z80182 Datasheet, PDF (56/109 Pages) Zilog, Inc. – ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)

Zilog
PRELIMINARY
CONTROL REGISTERS (Continued)
Read Register 10
D7 D6 D5 D4 D3 D2 D1 D0
Read Register 13
D7 D6 D5 D4 D3 D2 D1 D0
0
On Loop
0
0
Loop Sending
0
Two Clocks Missing
One Clock Missing
Z80182/Z8L182
ZILOG INTELLIGENT PERIPHERAL
TC8
TC9
TC10
TC11
TC12
TC13
TC14
TC15
Upper Byte
of Time Constant
Read Register 12
D7 D6 D5 D4 D3 D2 D1 D0
Read Register 15
D7 D6 D5 D4 D3 D2 D1 D0
TC0
TC1
TC2
TC3
Lower Byte
TC4
of Time Constant
TC5
TC6
TC7
0
Zero Count IE
SDLC Status FIFO Enable
DCD IE
Sync/Hunt IE
CTS IE
Tx Underrun/EOM IE
Break/Abort IE
Figure 53. Read Register Bit Functions
3-56
DS971820600