Z80182 Datasheet, PDF (38/109 Pages) Zilog, Inc. – ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)

Zilog
FREE RUNNING COUNTER
PRELIMINARY
FRC
Read Only
Addr 18H
76 543 210
Figure 32. Free Running Counter
CPU CONTROL REGISTER
CPU Control Register (CCR) Addr 1FH
D7 D6 D5 D4 D3 D2 D1 D0
000 00 000
Figure 33. CPU
Note: See Figure 49 for full description.
DMA REGISTERS
SAR0L
Read/Write
SA7
Addr 20H
SA0
SAR0H
Read/Write
SA15
Addr 21H
SA8
SAR0B
Read/Write
Addr 22H
SA19 SA16
- ---
Bits 0-2 (3) are used for SAR0B
A19, A18, A17, A16 DMA Transfer Request
x x 0 0 /DREQ0 (external)
x x 0 1 RDR0 (ASCI0)
x x 1 0 RDR1 (ASCI1)
x x 1 1 Not Used
Figure 34. DMA 0 Source Address Registers
Z80182/Z8L182
ZILOG INTELLIGENT PERIPHERAL
3-38
DS971820600