Z80182 Datasheet, PDF (28/109 Pages) Zilog, Inc. – ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP™)

Zilog
PRELIMINARY
PROGRAMMING (Continued)
Table 9. Z80182/Z8L182 ESCC, PIA and MISC Registers
Register Name
MPU Addr/Access
WSG Chip Select Register
Z80182 Enhancements Register
PC Data Direction Register
PC Data Register
Interrupt Edge/Pin MUX Control
ESCC Chan A Control Register
ESCC Chan A Data Register
ESCC Chan B Control Register
ESCC Chan B Data Register
PB Data Direction Register
PB Data Register
RAMUBR RAM Upper Boundary Register
RAMLBR RAM Lower Boundary Register
ROM Address Boundary Register
PA Data Direction Register
PA Data Register
System Configuration Register
xxD8H R/W
xxD9H R/W
xxDDH R/W
xxDEH R/W
xxDFH R/W
xxE0H
R/W
xxE1H
R/W
xxE2H
R/W
xxE3H
R/W
xxE4H
R/W
xxE5H
R/W
xxE6H
R/W
xxE7H
R/W
xxE8H
R/W
xxEDH R/W
xxEEH R/W
xxEFH
R/W
Z80182/Z8L182
ZILOG INTELLIGENT PERIPHERAL
PC Addr/Access
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
3-28
DS971820600