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DS617 Datasheet, PDF (82/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage
R
Platform Flash XL High-Density Configuration and Storage Device
Table 47: Command Interface States – Modify Table, Next Output State(1,2) (Cont’d)
Command Input
Current CI State
OTP Busy
Ready
Program Busy
Erase Busy
Buffer Program
Busy
Program/Erase
Suspend
Buffer Program
Suspend
Program Busy in
Erase Suspend
Buffer Program
Busy in Erase
Suspend
Program Suspend
in Erase Suspend
Buffer Program
Suspend in Erase
Suspend
Blank Check busy
Illegal State
Array
Status Register
Output Unchanged
Output Unchanged
Status
Register
Electronic
Signature/
CFI
Notes:
1. The output state shows the type of data that appears at the outputs if the bank address is the same as the command address. A bank can
be placed in Read Array, Read Status Register, Read Electronic Signature or Read CFI mode, depending on the command issued. Each
bank remains in its last output state until a new command is issued to that bank. The next state does not depend on the bank output state.
2. CI = Command Interface: CR = Configuration Register: BEFP = Buffer Enhanced Factory Program: P/E. C. = Program/Erase Controller.
3. At Power-Up, all banks are in Read Array mode. Issuing a Read Array command to a busy bank, results in undetermined data output.
4. The two cycle command should be issued to the same bank address.
5. If the P/E.C. is active, both cycles are ignored.
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
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