DS617 Datasheet, PDF (69/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage

R
Platform Flash XL High-Density Configuration and Storage Device
Appendix C: Flowcharts and Pseudocodes
X-Ref Target - Figure 37
Start
program_command (addressToProgram, dataToProgram) {:
Write 40h or 10h⁽³⁾
writeToFlash (addressToProgram, 0x40);
/*writeToFlash (addressToProgram, 0x10);*/
/*see note (3)*/
Write Address
& Data
writeToFlash (addressToProgram, dataToProgram) ;
/*Memory enters read status state after
the Program Command*/
Read Status
Register⁽³⁾
do {
status_register=readFlash (addressToProgram);
"see note (3)";
/* E or G must be toggled*/
NO
SR7 = 1
YES
} while (status_register.SR7== 0) ;
NO
SR3 = 0
YES
VPP Invalid
Error^(1,2)
if (status_register.SR3==1) /*VPP invalid error */
error_handler ( ) ;
NO
SR4 = 0
YES
Program
Error^(1,2)
if (status_register.SR4==1) /*program error */
error_handler ( ) ;
NO
SR1 = 0
Program to Protected
Block Error^(1,2)
if (status_register.SR1==1) /*program to protect block error */
error_handler ( ) ;
YES
End
}
DS617_31_101608
Notes:
1. Status check of SR1 (Protected Block), SR3 (VPP Invalid) and SR4 (Program Error) can be made after each program operation or after a sequence.
2. If an error is found, the Status Register must be cleared before further Program/Erase Controller operations.
3. Any address within the bank can equally be used.
4. To read the memory in Asynchronous mode, the CR15 Configuration Register bit must be written to 1.
Figure 37: Program Flowchart and Pseudocode
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
69