DS617 Datasheet, PDF (22/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage

R
Platform Flash XL High-Density Configuration and Storage Device
Controller is active; when the bit is High (set to ‘1’), the
controller is inactive, and the device is ready to process a
new command.
The Program/Erase Controller Status bit is Low immediately
after a Program/Erase Suspend command was issued until
the controller pauses. After the Program/Erase Controller
pauses the bit is High.
Erase Suspend Status Bit (SR6)
The Erase Suspend Status bit indicates that an erase
operation is suspended. When this bit is High (set to ‘1’), a
Program/Erase Suspend command was issued and the
memory is waiting for a Program/Erase Resume command.
The Erase Suspend Status bit should only be considered
valid when the Program/Erase Controller Status bit is High
(Program/Erase Controller inactive). SR6 is set within the
Erase Suspend Latency time of the Program/Erase
Suspend command being issued; therefore, the memory
can still complete the operation rather than entering the
Suspend mode.
When a Program/Erase Resume command is issued, the
Erase Suspend Status bit returns Low.
Erase/Blank Check Status Bit (SR5)
The Erase/Blank Check Status bit is used to identify if an
error occurred during a Block Erase operation. When this bit
is High (set to ‘1’), the Program/Erase Controller applied the
maximum number of pulses to the block and still failed to
verify that it erased correctly.
The Erase/Blank Check Status bit should be read after the
Program/Erase Controller Status bit is High (Program/Erase
Controller inactive).
The Erase/Blank Check Status bit is also used to indicate
whether an error occurred during the Blank Check
operation. If the data at one or more locations in the block
where the Blank Check command was issued is different
from FFFFh, SR5 is set to '1'.
After set High, the Erase/Blank Check Status bit must be set
Low by a Clear Status Register command or a hardware
reset before a new erase command is issued; otherwise, the
new command appears to fail.
Attempting to program a '1' to an already programmed bit
while V_PP = V_PPH also sets the Program Status bit High. If
V_PP is different from V_PPH, SR4 remains Low (set to '0'), and
the attempt is not shown.
After set High, the Program Status bit must be set Low by a
Clear Status Register command or a hardware reset before
a new program command is issued; otherwise, the new
command appears to fail.
V_PP Status Bit (SR3)
The V_PP Status bit is used to identify an invalid voltage on
the V_PP pin during program and erase operations. The V_PP
pin is only sampled at the beginning of a program or erase
operation. Program and erase operations are not
guaranteed if V_PP becomes invalid during an operation.
When the V_PP Status bit is Low (set to ‘0’), the voltage on
the V_PP pin was sampled at a valid voltage.
When the V_PP Status bit is High (set to ‘1’), the V_PP pin has
a voltage below the V_PP Lockout Voltage (V_PPLK). the
memory is protected and program and erase operations
cannot be performed.
After set High, the V_PP Status bit must be set Low by a Clear
Status Register command or a hardware reset before a new
program or erase command is issued; otherwise, the new
command appears to fail.
Program Suspend Status Bit (SR2)
The Program Suspend Status bit indicates that a program
operation is suspended. This bit should only be considered
valid when the Program/Erase Controller Status bit is High
(Program/Erase Controller inactive).
When the Program Suspend Status bit is High (set to ‘1’), a
Program/Erase Suspend command was issued, and the
memory is waiting for a Program/Erase Resume command.
SR2 is set within the Program Suspend Latency time of the
Program/Erase Suspend command being issued; therefore,
the memory can still complete the operation rather than
entering the Suspend mode.
When a Program/Erase Resume command is issued, the
Program Suspend Status bit returns Low.
Program Status Bit (SR4)
The Program Status bit is used to identify if there is an error
during a program operation. This bit should be read after the
Program/Erase Controller Status bit is High (Program/Erase
Controller inactive).
When the Program Status bit is High (set to ‘1’), the
Program/Erase Controller applied the maximum number of
pulses to the word and still failed to verify that it
programmed correctly.
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
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