DS617 Datasheet, PDF (6/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage

R
Platform Flash XL High-Density Configuration and Storage Device
X-Ref Target - Figure 6
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A
A0
A5
A7
VPP
A12
VDD
A17
A21
B
A1
VSS
A8
E
A13
NC
A18 ^READY_WAIT
C
A2
A6
A9
A11
A14
NC
A19
A20
D
A3
A4
A10
RP
NC
NC
A15
A16
E
DQ8
DQ1
DQ9
DQ3
DQ4
NC
DQ15
NC
F
K
DQ0
DQ10
DQ11
DQ12
NC
NC
G
G
A22
WP
DQ2
VDDQ
DQ5
DQ6
DQ14
W
H
L
NC
VDD
VSSQ
DQ13
VSS
DQ7
NC
DS617_10_110807
Notes:
1. See the FT64/FTG64 package specifications at http://www.xilinx.com/support/documentation/package_specifications.htm.
Figure 6: FT64 Package Connections (Top View through Package)
Write Protect (WP)
Write Protect is an input that gives an additional hardware
protection for each block. When Write Protect is at V_IL, the
Lock-Down is enabled, and the protection status of the
Locked-Down blocks cannot be changed. When Write
Protect is at V_IH, the Lock-Down is disabled, and the
Locked-Down blocks can be locked or unlocked.
Reset (RP)
The Reset input provides a hardware reset of the memory.
When Reset is at V_IL, the memory is in reset mode: the
outputs are high impedance, and the current consumption is
reduced to the Reset supply current I_DD2. After Reset all
blocks are in the Locked state, and the Configuration
Register is reset. When Reset is at V_IH, the device is in
normal operation. Exiting reset mode the device enters the
synchronous read mode and the FALS is executed.
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
6