DS617 Datasheet, PDF (47/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage

R
Platform Flash XL High-Density Configuration and Storage Device
X-Ref Target - Figure 26
A22–A3
A2–A0
L
E
G
READY_WAIT^{(1) Hi-Z}
DQ15–DQ0
T
AVAV
VALID ADDRESS
T_AVLH
T_LHAX
VALID ADDRESS
VALID ADD. VALID ADD. VALID ADD. VALID ADD. VALID ADD. VALID ADD. VALID ADD.
T
LLLH
T
LLQV
T_ELLH
T_ELQV
T
ELQX
T
GLTV
T_ELTV
T_GLQV
T_GLQX
VALID
DATA
T_AVQV1
VALID
DATA
VALID
DATA
VALID
DATA
VALID
DATA
VALID
DATA
VALID
DATA
VALID
DATA
Valid Address Latch
Outputs
Enabled
Valid Data
Notes:
1. READY_WAIT is active Low.
2. Write Enable (W) is High.
Figure 26: Asynchronous Page Read AC Waveforms, CR4 = 0
Standby
DS617_21_053008
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
47