DS617 Datasheet, PDF (77/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage

R
Platform Flash XL High-Density Configuration and Storage Device
NO
SR4 = 1
Read Status Register
SR3 and SR1for errors
Exit
Start
Write 80h to
Address WA1
Write D0h to
Address WA1
Read Status
Register
SETUP PHASE
Buffer_Enhanced_Factory_Program_Command
(start_address, DataFlow[]) {
writeToFlash (start_address, 0x80) ;
writeToFlash (start_address, 0xD0) ;
do {
do {
status_register = readFlash (start_address);
NO
SR7 = 0
YES
Initialize count
X=0
Write PDX
Address WA1
PROGRAM AND
VERIFY PHASE
if (status_register.SR4==1) { /*error*/
if (status_register.SR3==1) error_handler ( ) ;/*VPP error */
if (status_register.SR1==1) error_handler ( ) ;/* Locked Block */
}
while (status_register.SR7==1)
x=0; /* initialize count */
do {
writeToFlash (start_address, DataFlow[x]);
Increment Count
X=X+1
x++;
NO
X = 32
YES
Read Status
Register
NO
SR0 = 0
YES
NO
Last data?
YES
Write FFFFh to
Address = NOT WA1
Read Status
Register
EXIT PHASE
NO
SR7 = 1
YES
Full Status Register
Check
}while (x<32)
do {
status_register = readFlash (start_address);
}while (status_register.SR0==1)
} while (not last data)
writeToFlash (another_block_address, FFFFh)
do {
status_register = readFlash (start_address)
}while (status_register.SR7==0)
full_status_register_check();
End
}
Notes:
1. To read the memory in Asynchronous mode, the CR15 Configuration Register bit must be written to 1.
Figure 45: Buffer Enhanced Factory Program Flowchart and Pseudocode
DS617_39_101608
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
77