DS617 Datasheet, PDF (70/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage

R
Platform Flash XL High-Density Configuration and Storage Device
X-Ref Target - Figure 38
Start
Write Block
Address & BCh
Write Block
Address & CBh
Read
Status Register⁽¹⁾
SR7 = 1
NO
YES
SR4 = 1
SR5 = 1
YES
Command Sequence
Error⁽²⁾
blank_check_command (blockToCheck) {
writeToFlash (blockToCheck, 0xBC);
writeToFlash (blockToCheck, 0xCB);
/* Memory enters read status state after
the Blank Check Command */
do {
status_register = readFlash (blockToCheck);
/* see note (1) */
/* E or G must be toggled */
} while (status_register.SR7==0);
if (status_register.SR4==1) && (status_register.SR5==1)
/* command sequence error */
error_handler () ;
NO
SR5 = 0
Blank Check Error⁽²⁾
if (status_register.SR5==1)
/* Blank Check error */
error_handler () ;
End
}
Notes:
1. Any address within the bank can equally be used.
2. If an error is found, the Status Register must be cleared before further Program/Erase operations.
3. To read the memory in Asynchronous mode, the CR15 Configuration Register bit must be written to 1.
Figure 38: Blank Check Flowchart and Pseudocode
DS617_32_101608
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
70