DS617 Datasheet, PDF (20/88 Pages) Xilinx, Inc – MultiBoot Bitstream, Design Revision Storage

R
Platform Flash XL High-Density Configuration and Storage Device
Table 10: Protection Register Locks
Lock
Number Address
Bits
Description
bit 0
Preprogrammed to protect Unique Device Number, address 81h to 84h in PR0
Lock 1
80h
bit 1
Protects 64 bits of OTP segment, address 85h to 88h in PR0
bits 2 to 15 Reserved
bit 0
Protects 128 bits of OTP segment PR1
bit 1
Protects 128 bits of OTP segment PR2
bit 2
Protects 128 bits of OTP segment PR3
Lock 2
89h
–
–
bit 13
Protects 128 bits of OTP segment PR14
bit 14
Protects 128 bits of OTP segment PR15
bit 15
Protects 128 bits of OTP segment PR16
X-Ref Target - Figure 8
109h PR16
User Programmable OTP
102h
91h PR1
User Programmable OTP
Protection
Register Lock
8Ah
89h 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
88h _PR0
85h
User Programmable OTP
84h
Unique Device Number
81h
80h
Protection Register Lock
10
DS617_41_101508
Notes:
1. The iMPACT software does not support reading or writing of the protection register locks, OTP fields, or unique device number.
Figure 8: Protection Register Memory Map
DS617 (v3.0.1) January 07, 2010
www.xilinx.com
Product Specification
20