W83C553F Datasheet, PDF (42/159 Pages) Winbond – SYSTEM I/O CONTROLLER WITH PCI ARBITER

W83C553F
Electrical Specifications
3.11 PCI Memory Write
The Master Memory Write command (C/BE[3:0]# = 7h during the address phase) cycle is used by the W83C553F when
writing to memory. The W83C553F issues a request for the bus and, when granted access, writes one Dword to system
memory. The bus is then released. The data phase in Figure 3-7 takes two clock cycles, as determined by TRDY#.
In slave mode, PCI-to-ISA memory writes and ROM writes are supported.
Figure 3-7. Master Memory Write Timing
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