W83C553F Datasheet, PDF (21/159 Pages) Winbond – SYSTEM I/O CONTROLLER WITH PCI ARBITER

W83C553F
Pin Descriptions
Pin Name
Pin #
PCI5TH# / ¹³
GNT3#
REQ3#
15
GNT4# /
6
FLSHREQ#
REQ4# /
7
FLSHACK#
PWRPC/X86# ⁸
/ CPUGNT#
CPUREQ#
9
Table 2-3 (continued). PCI Arbiter Signals
Input/
Output Description
Input/
Output
When the on-chip PCI arbiter is enabled, GNT3# behaves as a
normal PCI grant output.
If a 2.2K ohm resistor straps this pin to ground, pin 6 and 7 function
as GNT4# and REQ4# after power-up. If this pin is weakly
strapped to VCC, pin 6 and 7 function as FLSHREQ# and
FLSHACK# after power-up. The PCI5TH# function is overridden
by the ARBDIS# function (i.e., if the on-chip PCI arbiter is
disabled, pin 6 and 7 function as FLSHREQ# and FLSHACK# no
matter how PCI5TH# is strapped.)
Input
When the on-chip PCI arbiter is enabled, REQ3# behaves as a
normal PCI request input.
Output
This is a multifunction pin which is alternately used to request
flushing all buffers or granting PCI access to an external master.
Input
This is a multifunction pin which is alternately used as flush
acknowledge or as a PCI access request input.
Input/
Output
This multifunction pin is sampled by the W83C553F, following the
PWRGD active edge. If a 2.2K ohm resistor is weakly pulling this
pin to VCC at this time, the W83C553F is in PowerPC mode. If a
weak pull down resistor is connected to ground, the chip is in x86
mode.
When the PCI arbiter within the W83C553F is enabled (pin 16
Arbdis#/GNT2# is weakly pulled high), this pin functions as the
CPU Grant output which allows the system CPU-to-PCI bridge to
have access to PCI.
Input
This input allows the system CPU to request access to the PCI bus
in systems with the PCI arbiter within the W83C553F enabled.
WINBOND SYSTEMS LABORATORY
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