W83C553F Datasheet, PDF (36/159 Pages) Winbond – SYSTEM I/O CONTROLLER WITH PCI ARBITER

W83C553F
Electrical Specifications
Refer to Figure 3-1. Bus acquisition timing cycles are defined by the C/BE[3:0]# command lines during the address (AD)
phase of each PCI cycle.
Figure 3-1. Bus Acquisition Timing
WINBOND SYSTEMS LABORATORY
33