W83C553F Datasheet, PDF (145/159 Pages) Winbond – SYSTEM I/O CONTROLLER WITH PCI ARBITER

W83C553F
Timing Diagrams
Table 6-5. Miscellaneous Timing
Parameter
t24 IDEIRQ[A:B] high to INT# low
or ISA IRQ high
t25 IDEIRQ[A:B] low to INT# float
or ISA IRQ low
t26 RST# low to IDE_RST# low
Values
Min
Max
Notes
-
50ns Assumes that the interrupt path is enabled.
It could be disabled or
temporarily delayed due to read data in a
FIFO.
-
50ns
30ns
50ns
t27 RST# high to IDE_RST# high
-
50ns
t28 IDECS1# setup to
RST# high
t29 IDECS1# hold from
RST# high.
20ns
-
0ns
-
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