W83C553F Datasheet, PDF (140/159 Pages) Winbond – SYSTEM I/O CONTROLLER WITH PCI ARBITER

W83C553F
6.1 PCI Timing Diagrams
This section provides timing information on PCI cycles supported by the W83C553F.
Table 6-1. PCI Clock Timing
Timing Diagrams
Note:
For 5V PCI Bus, measurements were taken from 0.4V to 2.4V.
All VDD are 4.75V to 5.25V
Parameter
t1 CLK cycle time
t2 CLK high time
t3 CLK low time
t4 CLK slew rate
Values
Min Max
Notes
30ns
The W83C553F will operate properly at any
frequency between 0 and 33 MHz.
11ns
-
11ns
-
1V/ns 4V/ns
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