W83C553F Datasheet, PDF (28/159 Pages) Winbond – SYSTEM I/O CONTROLLER WITH PCI ARBITER

W83C553F
Pin Descriptions
Pin Name
Pin #
SECURITY / ¹¹⁶
XRD#
IRQ1
121
IRQ8#
120
XOE#
117
XCS0/
119
ROMCS
XCS1/X8XCS
118
Table 2-6. X Bus Signals
Input/
Output Description
Output/
Input
X Bus Read. When active "0", data flows from XD to SD. When
the W83C553F is in PowerPC mode, this pin is sampled after reset
and its value is reflected in bit 2 of the Port 92 register (see page
107).
Input
Keyboard Controller Interrupt.
Input
Real Time Clock Interrupt.
Output/
Input
X Bus Buffer Enable. This signal enables an external X-bus buffer
whenever an X-bus device is decoded. This pin is a strap pin, needs
a 2.2k Ohm resistor pull up, otherwise will be in test mode.
Output
This is a multi-function pin. When the W83C553F is in PowerPC
mode, this pin functions as the chip select for an external ROM,
using default ISA memory cycle timing. When the W83C553F is in
x86 mode, this pin functions as the lower bit of the X-bus Address.
Output
This is a multi-function pin. When the W83C553F is in PowerPC
mode, this pin functions as the chip select for ports in the 800h-
8FFh I/O address range. When the W83C553F is in x86 mode, this
pin functions as the upper bit of the X-bus Address. In x86 mode,
an external decoder is required to decode the chip selects for X-bus
devices:
XCS[1:0] Device
00
Idle
01
RTC Address Latch
10
RTC Data Port
11
ROM/BIOS or Keyboard Controller
WINBOND SYSTEMS LABORATORY
25