W83C553F Datasheet, PDF (20/159 Pages) Winbond – SYSTEM I/O CONTROLLER WITH PCI ARBITER

W83C553F
Pin Descriptions
Pin Name
GNT0# /
PIBREQ#
Pin #
26
REQ0# /
25
PIBGNT#
GNT1# /
28
IDEREQ#
REQ1# /
27
IDEGNT#
ARBDIS# / ¹⁶
GNT2#
REQ2#
17
Table 2-3. PCI Arbiter Signals
Input/
Output Description
Output
This is a multifunction pin. The W83C553F PCI-ISA bridge
(Function 0) asserts this signal to request the use of the PCI bus
when the on-chip PCI arbiter is disabled. This pin functions as
GNT0# when the on-chip PCI arbiter is enabled, allowing PCI
access to an external master.
Input
This is a multifunction pin. An external arbiter asserts this signal to
grant the next PCI access to the PCI-ISA bridge (Function 0) when
the on-chip PCI arbiter is disabled. This pin functions as REQ0#
when the on-chip PCI arbiter is enabled.
Output
This is a multifunction pin. The W83C553F IDE master (Function
1) asserts this signal to request the use of the PCI bus when the on-
chip PCI arbiter is disabled. This pin functions as GNT1# when the
on-chip PCI arbiter is enabled, allowing PCI access to an external
master.
Input
This is a multifunction pin. An external arbiter asserts this signal to
grant the next PCI access to the IDE master when the on-chip PCI
arbiter is disabled. This pin functions as REQ1# when the on-chip
PCI arbiter is enabled.
Input/
Output
When the on-chip PCI arbiter is enabled, it uses this pin to grant the
next PCI access. If a 2.2k Ohm resistor straps this pin to ground,
the PCI arbiter is disabled after power-up. This overrides the
strapping of PCI5TH# on pin 13.
Input
When the on-chip PCI arbiter is enabled, external PCI masters use
this pin to request access to the PCI bus.
WINBOND SYSTEMS LABORATORY
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