LM3S5956-IQR80-C1 Datasheet, PDF (981/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5956 Microcontroller
Bit/Field
3:2
1:0
Name
ENUPD1
ENUPD0
Type
R/W
R/W
Reset
0
Description
PWM1 Enable Update Mode
Value Description
0x0 Immediate
Writes to the PWM1EN bit in the PWMENABLE register are used
by the PWM generator immediately.
0x1 Reserved
0x2 Locally Synchronized
Writes to the PWM1EN bit in the PWMENABLE register are used
by the PWM generator the next time the counter is 0.
0x3 Globally Synchronized
Writes to the PWM1EN bit in the PWMENABLE register are used
by the PWM generator the next time the counter is 0 after a
synchronous update has been requested through the PWM
Master Control (PWMCTL) register.
0
PWM0 Enable Update Mode
Value Description
0x0 Immediate
Writes to the PWM0EN bit in the PWMENABLE register are used
by the PWM generator immediately.
0x1 Reserved
0x2 Locally Synchronized
Writes to the PWM0EN bit in the PWMENABLE register are used
by the PWM generator the next time the counter is 0.
0x3 Globally Synchronized
Writes to the PWM0EN bit in the PWMENABLE register are used
by the PWM generator the next time the counter is 0 after a
synchronous update has been requested through the PWM
Master Control (PWMCTL) register.
October 06, 2012
981
Texas Instruments-Production Data