LM3S5956-IQR80-C1 Datasheet, PDF (50/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

Architectural Overview
NRND: Not recommended for new designs.
Figure 1-1. Stellaris LM3S5956 Microcontroller High-Level Block Diagram
LM3S5956
JTAG/SWD
System
Control and
Clocks
(w/ Precis. Osc.)
ARM®
Cortex™-M3
(80MHz)
ROM
Boot Loader
DriverLib
AES & CRC
NVIC
DCode bus
MPU
ICode bus
System Bus
Flash
(256KB)
Bus Matrix
SRAM
(64KB)
DMA
General-
Purpose
Timer (4)
USB OTG
(FS PHY)
SSI
(2)
Analog
Comparator
(2)
PWM
(6)
SYSTEM PERIPHERALS
Watchdog
Timer
(2)
Hibernation
Module
GPIOs
(33)
SERIAL PERIPHERALS
UART
(3)
I2C
(2)
CAN
Controller
(1)
ANALOG PERIPHERALS
10- Bit ADC
Channels
(8)
MOTION CONTROL PERIPHERALS
QEI
(1)
50
October 06, 2012
Texas Instruments-Production Data