LM3S5956-IQR80-C1 Datasheet, PDF (13/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5956 Microcontroller
Figure 18-2. Structure of Comparator Unit .............................................................................. 937
Figure 18-3. Comparator Internal Reference Structure ............................................................ 937
Figure 19-1. PWM Module Diagram ....................................................................................... 949
Figure 19-2. PWM Generator Block Diagram .......................................................................... 949
Figure 19-3. PWM Count-Down Mode .................................................................................... 951
Figure 19-4. PWM Count-Up/Down Mode .............................................................................. 952
Figure 19-5. PWM Generation Example In Count-Up/Down Mode ........................................... 952
Figure 19-6. PWM Dead-Band Generator ............................................................................... 953
Figure 20-1. QEI Block Diagram .......................................................................................... 1020
Figure 20-2. Quadrature Encoder and Velocity Predivider Operation ...................................... 1022
Figure 21-1. 64-Pin LQFP Package Pin Diagram .................................................................. 1041
Figure 24-1. Load Conditions ............................................................................................... 1069
Figure 24-2. JTAG Test Clock Input Timing ........................................................................... 1070
Figure 24-3. JTAG Test Access Port (TAP) Timing ................................................................ 1070
Figure 24-4. Power-On Reset Timing ................................................................................... 1071
Figure 24-5. Brown-Out Reset Timing .................................................................................. 1071
Figure 24-6. Power-On Reset and Voltage Parameters ......................................................... 1072
Figure 24-7. External Reset Timing (RST) ............................................................................ 1072
Figure 24-8. Software Reset Timing ..................................................................................... 1072
Figure 24-9. Watchdog Reset Timing ................................................................................... 1073
Figure 24-10. MOSC Failure Reset Timing ............................................................................. 1073
Figure 24-11. Hibernation Module Timing with Internal Oscillator Running in Hibernation .......... 1078
Figure 24-12. Hibernation Module Timing with Internal Oscillator Stopped in Hibernation .......... 1078
Figure 24-13. ADC Input Equivalency Diagram ....................................................................... 1080
Figure 24-14. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................. 1081
Figure 24-15. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............... 1081
Figure 24-16. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................... 1082
Figure 24-17. I²C Timing ....................................................................................................... 1083
Figure C-1. Stellaris LM3S5956 64-Pin LQFP Package ........................................................ 1139
Figure C-2. 64-Pin LQFP Tray Dimensions .......................................................................... 1141
Figure C-3. 64-Pin LQFP Tape and Reel Dimensions ........................................................... 1142
October 06, 2012
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