LM3S5956-IQR80-C1 Datasheet, PDF (723/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5956 Microcontroller
Figure 15-13. Slave Command Sequence
Idle
Write OWN Slave
Address to
I2CSOAR
Write -------1
to I2CSCSR
Read I2CSCSR
NO _{TREQ bit=1?}
YES
Write data to
I2CSDR
NO _{RREQ bit=1?}
FBR is
also valid ^YES
Read data from
I2CSDR
15.4
Initialization and Configuration
The following example shows how to configure the I²C module to transmit a single byte as a master.
This assumes the system clock is 20 MHz.
1. Enable the I²C clock by writing a value of 0x0000.1000 to the RCGC1 register in the System
Control module (see page 268).
2. Enable the clock to the appropriate GPIO module via the RCGC2 register in the System Control
module (see page 277). To find out which GPIO port to enable, refer to Table 22-5 on page 1062.
3. In the GPIO module, enable the appropriate pins for their alternate function using the
GPIOAFSEL register (see page 431). To determine which GPIOs to configure, see Table
22-4 on page 1056.
4. Enable the I²C pins for open-drain operation. See page 436.
5. Configure the PMCn fields in the GPIOPCTL register to assign the I²C signals to the appropriate
pins. See page 448 and Table 22-5 on page 1062.
6. Initialize the I²C Master by writing the I2CMCR register with a value of 0x0000.0010.
October 06, 2012
723
Texas Instruments-Production Data