LM3S5956-IQR80-C1 Datasheet, PDF (15/1144 Pages) Texas Instruments – Stellaris® LM3S5956 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S5956 Microcontroller
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μDMA Interrupt Assignments .............................................................................. 368
Channel Control Structure Offsets for Channel 30 ................................................ 369
Channel Control Word Configuration for Memory Transfer Example ...................... 369
Channel Control Structure Offsets for Channel 7 .................................................. 370
Channel Control Word Configuration for Peripheral Transmit Example .................. 371
Primary and Alternate Channel Control Structure Offsets for Channel 8 ................. 372
Channel Control Word Configuration for Peripheral Ping-Pong Receive
Example ............................................................................................................ 373
μDMA Register Map .......................................................................................... 374
GPIO Pins With Non-Zero Reset Values .............................................................. 412
GPIO Pins and Alternate Functions (64LQFP) ..................................................... 412
GPIO Pad Configuration Examples ..................................................................... 418
GPIO Interrupt Configuration Example ................................................................ 419
GPIO Pins With Non-Zero Reset Values .............................................................. 420
GPIO Register Map ........................................................................................... 420
GPIO Pins With Non-Zero Reset Values .............................................................. 431
GPIO Pins With Non-Zero Reset Values .............................................................. 437
GPIO Pins With Non-Zero Reset Values .............................................................. 439
GPIO Pins With Non-Zero Reset Values .............................................................. 442
GPIO Pins With Non-Zero Reset Values .............................................................. 448
Available CCP Pins ............................................................................................ 463
General-Purpose Timers Signals (64LQFP) ......................................................... 464
General-Purpose Timer Capabilities .................................................................... 465
Counter Values When the Timer is Enabled in Periodic or One-Shot Modes .......... 466
16-Bit Timer With Prescaler Configurations ......................................................... 467
Counter Values When the Timer is Enabled in RTC Mode .................................... 468
Counter Values When the Timer is Enabled in Input Edge-Count Mode ................. 468
Counter Values When the Timer is Enabled in Input Event-Count Mode ................ 470
Counter Values When the Timer is Enabled in PWM Mode ................................... 471
Timers Register Map .......................................................................................... 476
Watchdog Timers Register Map .......................................................................... 511
ADC Signals (64LQFP) ...................................................................................... 535
Samples and FIFO Depth of Sequencers ............................................................ 536
Differential Sampling Pairs ................................................................................. 543
ADC Register Map ............................................................................................. 552
UART Signals (64LQFP) .................................................................................... 613
UART Register Map ........................................................................................... 622
SSI Signals (64LQFP) ........................................................................................ 670
SSI Register Map .............................................................................................. 681
I2C Signals (64LQFP) ........................................................................................ 711
Examples of I²C Master Timer Period versus Speed Mode ................................... 715
Inter-Integrated Circuit (I²C) Interface Register Map ............................................. 724
Write Field Decoding for I2CMCS[3:0] Field ......................................................... 730
Controller Area Network Signals (64LQFP) .......................................................... 749
Message Object Configurations .......................................................................... 754
CAN Protocol Ranges ........................................................................................ 762
CANBIT Register Values .................................................................................... 762
CAN Register Map ............................................................................................. 766
October 06, 2012
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